1. Field of the Invention
The present invention relates to a thin film resistor element and a manufacturing method thereof, more particularly, to a thin film resistor element and a manufacturing method thereof using the wafer level chip size package technology.
This is a counterpart of Japanese patent application Serial Number 117576/2008, filed on Apr. 28, 2008, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
Regarding mobile communication equipments, more requests for higher functions and downsizing have been made progressively, and furthermore, development of lower-power-consumption electric components for the mobile communication equipments has become an important problem, in a prediction that stable operations thereof using longer-life batteries and the energy regeneration technology will become necessary.
According to the Japanese Patent Application Laid-Open Publication No. 2006-186038 and No. 2005-136360, the technology for improving packaging density by forming and integrating resistors, inductors, or capacitors in higher density in insulating films, corresponding to the above-mentioned requests.
In addition, to the above-mentioned requests for lower power consumption, LSIs using the CMOS process technology have become remarkable as higher-frequency analog ICs of radio wave communications. In higher-frequency analog LSIs, voltage-controlled oscillators (VCOs) used for local oscillators are blocks consuming extra-large currents, and lower current consumption VCOs are considered to be effective to reduce the power consumption of the whole chip.
However, since the conventional VCOs uses polysilicon formed at the same time as the gate electrodes formed as resistors, the above resistors lie in between in the vicinity of the substrate. That is, parasitic capacitances between the substrate and the resistors are large, and then quality factor (Q-value) of the passive elements of the VCOs decreases.
In a typical VCO, passive elements such as inductors, varactors, or resistors are formed on-chip. Since the VCO oscillates theoretically by resonance caused by LC, the higher Q-value have the inductors and the varactors, the smaller loss has the resonance circuit, and then it becomes possible that an oscillation using smaller current realizes lower power consumption.
As one of the above passive elements, the varactor varies the capacitance by an applied DC bias voltage, and a resistor of around 3000Ω is usually inserted to a control terminal for applying the DC bias voltage in order to prevent high-frequency signal leakage to the above control terminal. In the case where the above resistor has ideal resistor characteristics, the above-mentioned higher Q-value can be obtained.
Generally, polysilicon used for forming gates of transistors is used as the on-chip resistors inserted between the varactors. Since the polysilicon is formed on a lower layer of wafer process, the distance to the substrate is short. Consequently, a parasitic capacitance is equivalently loaded between the grounds points by capacitive connections between the resistors and the substrate. Subsequently, the impedance decreases in higher frequency region, and an apparent Q-value of the varactor decreases.